So, a sort of saturable reactor/mag amp setup. That is clever...the descriptions I found weren't very detailed, and left the impression that each word had its own address line with an external multiplexer.
There's actually more than one way to make a read-only transformer memory (as I think it's called) and several distinct designs can be found in the Apollo literature. That confused a bunch of us as to which was actually used in the AGC.
I think all were used in various places; e.g., IBM used a different architecture to contain the software for a peripheral controller.
As you point out, the arrangement of the Apollo core rope memory minimized the number of components, and that's highly desirable in hardware designed for space. But this came at
significantly increased manufacturing complexity; consider what was required to change a single bit in the memory to correct a software bug. You'd have to unthread an entire sense wire and rethread another one, making the change in just one of the cores it has to traverse. The IBM scheme had a clever book-like structure with pages that were essentially very thin circuit boards that could be individually replaced to change a given word of memory.