Orion spacecraft and radiation

[scooter]

This is a pretty generic issue...As I understand it, today's micro circuitry is more sensitive to radiation than the systems in the Apollo days. Obviously, it's not an insurmountable issue, considering the hundreds of modern satellites operating up in the geo orbits and the eccentric GPS platforms...
What particular issues are there with sending modern electronics into/through the belts? What are the issues for the particle vs ray types?

[Luke Pemberton]

This is a pretty generic issue...As I understand it, today's micro circuitry is more sensitive to radiation than the systems in the Apollo days. Obviously, it's not an insurmountable issue, considering the hundreds of modern satellites operating up in the geo orbits and the eccentric GPS platforms...
What particular issues are there with sending modern electronics into/through the belts? What are the issues for the particle vs ray types?

I would suggest that the GCR and any high energy protons from SPE events are the main concern. These impinging on semiconductors will damage the lattice structure by displacing atoms over time. This will degrade p-n semiconductor doping.

I can't find the source, but I know that in one sample of the Apollo rocks the valence state of iron was changed from Fe²⁺ to Fe³⁺ (Ferrous to Ferric) so that trace amounts of Fe³⁺ were discovered. This was attributed to the GCR changing the conduction and valence bands of the iron. Similarly, the valence and conduction bands of semiconductors will be damaged by GCR. This will degrade the semiconductor properties.

The other problem will be EM radiation from shock generated CMEs, and hardening will be needed. The parallel to this would be military hardware that was hardened for nuclear war and EMPs from nuclear explosions.

[scooter]

Thanks Luke (though there was a fair bit of "Greek" for me in all that...)

For the long duration satellites like GPS, are there general "hardening" techniques/materials used...these satellites I would assume take a relative "beating"...

[Luke Pemberton]

Thanks Luke (though there was a fair bit of "Greek" for me in all that...)

Sorry. Basically, the way to think about it is that there are lots of free electrons in metals which makes metal great conductors of electricity.

In semiconductors there are fewer free electrons for conduction. Instead of free electrons, semiconductors have bands, valence bands and conduction bands. Between the bands there is an energy gap. This is a simplification, but the electrons in the valence band do not take part in conduction. The electrons in the conduction band do.

Electrons in the valence band can be promoted to the conduction band by increasing their energy. It is a bit like being on the bottom of a ladder. The bottom rung is where the valence electrons reside, the top rung is where the conduction electrons reside - except that electrons cannot sit on rungs between. So to go to the top rung you need to give the electron enough energy to get it there. These bands are subtly changed by a thing called doping. If you put atoms that have spare electrons into a semiconductor, it is called n type doping. If you put atoms that don't have atoms to lend to others it is called p type doping (I won't get into hole theory). Basically, this doping changes the electrical properties of the semiconductor markedly for small amounts of doping material. However, damage to the crystal and the doping will destroy the semiconductor properties.

The reason for this is that practical semiconductors are generally fabricated from p and n type silicon, and once you expose this to radiation and begin displacing atoms it will ruin the properties of the semiconductor. This is because the semiconductor is made of p-n materials that are layered together.  For instance, transistors are made from n-p-n or p-n-p sandwiches, while diodes are made of a p-n junction.

When you think about microelectronics, there are millions of transistors on a chips and these are miniaturised, so exposure to radiation is not good as it tends to knock atoms about.

For the long duration satellites like GPS, are there general "hardening" techniques/materials used...these satellites I would assume take a relative "beating"...

I'd refer you to Jay, sts60 and ka9q for that one, as well as a few others. I guess there are practical considerations between payload and objectives. I'm sure ka9q will be able to talk about hardening with more expertise than I can.

[scooter]

Thanks for your explanation Luke...was "almost" back in my high school physics class there... 

[JayUtah]

Up to the point where I can speak knowledgeably about it, there are three strategies for radiation hardening.  My brother is the real expert on this.  (There's a joke in there somewhere.)

First and most obvious is shielding,  Assembly-level shielding simply encloses the sensitive assemblies (i.e., the CPU, the erasable and non-erasable stores, and critical peripherals) in a buttload of aluminum.  A baseline thickness is around half an inch, but you can add more.  Other materials and sandwiches of materials such as aluminum and ceramics (which attenuate x-rays better without secondary effects) are commonly used.

Second is component-level engineering.  I'm not an electrical engineer, so I have to handwave through this part.  The discussion above regarding PNP and NPN components, doping, etc. is entirely valid.  We use bipolar (i.e., as opposed to MOS-type) component formulation because it is inherently more resistant to radiation.  However, it also consumes more electrical current, so that design decision ripples into the electrical power supply engineering.  But I digress.  In addition to degrading the doping as described above, ionizing radiation also affects electronics by means that almost resemble pure thermal and projectile effects.  The solution to all these problems is simply more material.  Integrated-circuit engineering for consumer ends strives for reduced power consumption and size.  In contrast, engineering for space environments strikes a balance between performance and robustness, which allows for larger-scale construction.  You simply provide more material.  You provide more doped material than strictly required so that it takes a long time for radiation to degrade that amount of it.  Similarly you build the chips at a coarser scale because impact damage is proportionally less.

Finally -- and most intriguingly -- you think about circuits entirely differently.  When using common components like COTS chips and COTS CPUs, you rig them using component-level redundancy strategies.  But even more sneaky, you eschew traditional CPUs and circuit layouts in favor of FPGAs, a sort of Swiss Army knife of circuitry that can be reconfigured via ground commands to work around failed elements.

[scooter]

Thanks for the great responses...

odd question here...has there been any opportunity (unclassified) to physically examine shielding materials to determine any degradation/erosion/penetration over long exposure times? (LDEF?)

I suppose I'm just trying to get my hands around systems which spend years in space, and in this example, a higher radiation environment. I believe that today's micro circuitry is more sensitive to such things. Does it just become a lifespan/mission duration issue?

oh, and should an inopportune SME be seen, are there maneuvers/cover procedures to protect things (or would it be necessary)? I'm starting to feel like an HB, but in this case, I'm thinking extreme situations, and very long exposure timeframes...which are obviously viable, considering all the hardware that we're pretty dependent on daily basis (if Direct TV would just give us back our channel 5!!!!!!!)
Many thanks

[scooter]

...and I seem to recollect some years back a bounty on the older x86 chips, as they were more resistant to particle radiation than the newer forms...?

[Luke Pemberton]

oh, and should an inopportune SME be seen, are there maneuvers/cover procedures to protect things (or would it be necessary)? I'm starting to feel like an HB, but in this case, I'm thinking extreme situations, and very long exposure timeframes...which are obviously viable, considering all the hardware that we're pretty dependent on daily basis (if Direct TV would just give us back our channel 5!!!!!!!)
Many thanks

I am of the understanding that the main concern for satellite hardware is disruption/possible failure in the event of electromagnetic radiation generated by large solar storms. Such events are not isolated to problems in space.

US woefully unprepared for major sun storm – report

I also found this interesting and very recent article. The sun might be on the verge of being active.

NASA detects enormous 'coronal hole' on Sun’s South Pole (PHOTO)

[ka9q]

Radiation damages electronics in two major ways: cumulative dose and single-event upset. Luke and Jay have already touched on the first problem, and I'll add some more comments.

Electronic circuits lack the self-repair mechanisms of biological organisms so radiation damage tends to accumulate over years. Passive components (batteries, filters, inductors, capacitors, resistors, relays, etc) tend to be much more rad-tolerant than semiconductors, although some passive components, notably batteries and capacitors, often fail for other reasons. Discrete transistors, because of their larger sizes, tend to be more resistant than integrated circuits.

Analog electronics (amplifiers, etc) generally degrades slowly; noise levels increase, gains decrease, DC offset levels drift, etc. Conservative circuit design that tolerates these slow changes can delay but not avoid the inevitable. Digital systems, on the other hand, tend to work fine until they fail. Redundancy is of limited help since everything receives pretty much the same dose and will fail at about the same time.

While most digital designers would groan at the thought of using Apollo's relay logic today, one thing you can say for it is that it was practically immune to radiation. So were Apollo's read-only core rope and read-write core memories.

Solar arrays are semiconductors, so their degradation is a major system level design consideration. You'll usually see spacecraft solar panels rated as giving so many watts at some illumination level BOL (beginning of life) and EOL (end of life), i.e., after some specified number of years. Protective UV filters ("cover slips") are invariably provided to reduce (but not eliminate) damage from that source. They stop relatively weak charged particles, but obviously cannot be as effective as several cm of metal.

Semiconductor fabrication methods can vary greatly in radiation susceptibility, and it's not always a direct function of feature size.

I haven't looked closely at this stuff for several decades so I'm not up on the current methods and dose limits. In low earth orbit you can often get away with standard commercial parts, especially if you get clever with component placement, e.g., putting the less sensitive stuff on the outside so it can shield the stuff inside. But for many spacecraft (e.g., interplanetary missions, especially to the gas giants like Jupiter) there's little choice but to pay big money for the rad-hard space-qualified stuff because you just can't do enough with shielding and system-level redundancy.

[ka9q]

The other major problem with space radiation and electronics is a single-event upset (SEU) causing a "latch-up" condition.

Latch-ups happen because of "parasitic" junction structures in many integrated circuits. They don't show up in the schematic of the circuit but are physically present because of the way the circuit is fabricated. Under normal circumstances (i.e., without ionizing radiation) they are effectively invisible and do not impair operation.

The classic parasitic junction is a PNPN structure, effectively a PNP and an NPN transistor wired in a self-regenerative loop. When either transistor is turned on, it turns on the other, which in turn keeps the first turned on. They stay this way until power is removed.  PNPN devices known as SCRs (silicon-controlled rectifiers) were widely used as high power switches before the development of power MOSFETs and IGBTs, which can be turned off without interrupting power. (The SCRs in the fuel cell overload-detection circuits in Apollo 12 were triggered by the first lighting strike, taking all three fuel cells offline.)

Stray PNPN structures in ICs are usually no problem because no connections are made to the "bases" of the transistors that could trigger them. But if a charged particle were to strike, it could trigger either or both transistors into conducting for just an instant. And that's all it takes to latch the whole thing on.

If, as often happens, the stray PNPN structure appears across the supply rails (the + and - power supply lines), you can easily see what happens next: the chip short-circuits the power supply until the high current vaporizes one or more bond wires between the chip die and the package leads and the circuit is destroyed.

Latchup can be prevented entirely by carefully avoiding parasitic structures, but because they're not a problem in most commercial applications generally only the expensive rad-hard space rated parts are latchup-free. If your budget doesn't allow for them, you can take steps to mitigate the damage should an SEU occur. The most obvious is a very-fast-acting self-resetting circuit breaker on the power supply to the chip; it disconnects power before the chip can destroy itself, resetting the latched-up PNPN.

Latchup can be a design issue even in terrestrial systems. Back in the Reagan/Star Wars 1980s, I saw a spec sheet for a "nuclear event detector" IC, designed (in all seriousness) to detect the gamma pulse from a nearby "nuclear event" (i.e., nuclear explosion). This was intended for use in military systems to quickly remove and reapply power from a circuit not using latchup-free ICs, presumably to keep it running for a few more milliseconds before the whole thing is vaporized by the fireball. But I suppose there could have been cases where it might have helped.

Edited to add: Hey, it looks like these things are still on the market. http://www.maxwell.com/products/microelectonics/space-nuclear-event See how many clever uses you could make of these parts.

[ka9q]

A third effect of radiation on electronics is much easier to alleviate than the first two: transient errors in semiconductor memories. A charged particle can flip the state of a static RAM cell (two transistors connected as a flip-flop) or remove or add charge to the floating gate of a dynamic RAM cell or Flash memory cell.

You can't fix the (small) amount of damage probably done by the charged particle to the nearby semiconductor lattice; that's the cumulative dose problem discussed earlier. But you can easily use error correction codes (ECCs) to fix the flipped bit(s). Many server-type motherboards now have ECC RAM as an option to protect against flipped bits due to cosmic ray hits or trace amounts of radioactive materials in the chip packaging.

If you use ECC to protect a memory, it's important that you periodically "wash" or "scrub" the memory by reading out every location, detecting and correcting any accumulated errors, and writing back regenerated, correct values. Every error detection/correction code has limits on how many errors can be fixed, and it's important to avoid reaching that limit.

[Bob B.]

odd question here...has there been any opportunity (unclassified) to physically examine shielding materials to determine any degradation/erosion/penetration over long exposure times? (LDEF?)

This may not be completely relevant to your question, but NASA did extensive research into the effects of radiation on materials back in the 1960s and early 70s.  This was done at the NASA Plum Brook Reactor Facility in Ohio, where my father worked.  They used the reactor to bombard materials and components with radiation to study the effects.  Or course I don't know how much of a correlation there is between the radiations the reactor put out versus naturally occurring space radiation.  The research was conducted in support of Project Rover, which was NASA's attempt to develop a thermal nuclear rocket.  I believe their focus was more on how materials would be effected both short- and long-term by their own reactor rather than by natural sources.

[ka9q]

JPL has published handbooks with the results of radiation tests on many different kinds of electronic components. The problem, of course, is that many of the parts (especially the semiconductors) are long obsolete. In fact, space-qualified rad-hard parts tend to be as much as a decade behind the commercial state of the art.

This is a major reason why FPGAs (field programmable gate arrays) are so popular in spacecraft. You only have to design and qualify one (or a few) parts, and then you can use them for lots of things. The microprocessor is a similar idea, but many circuits still have to operate faster than you can practically do them in software on a computer.

[cjameshuff]

Finally -- and most intriguingly -- you think about circuits entirely differently.  When using common components like COTS chips and COTS CPUs, you rig them using component-level redundancy strategies.  But even more sneaky, you eschew traditional CPUs and circuit layouts in favor of FPGAs, a sort of Swiss Army knife of circuitry that can be reconfigured via ground commands to work around failed elements.

Which is really interesting, because FPGAs take massively larger quantities of silicon-level circuitry to implement logic. They are basically the "computronium" of science fiction, fabrics of tiny computational units consisting of lookup tables and latches, state machines with a single bit of state controlled by a Karnaugh map that can encode the result of any combinatorial logic with the given number of input bits (typically 4 or 6). So implementing the equivalent of a handful of gates takes a 16-64 bit SRAM array and a whole bunch of wiring running across the entire chip (which generally limits them to rather low clock rates), through multiple crossbar switches that can connect it to one or more of the other logic cells on the chip.

It would all be the complete opposite of a radiation-hardened system, except for the fact that a FPGA can be reconfigured on the fly to implement all sorts of different functionality. A FPGA can replace whole sets of chips, reducing the number of targets, reducing the size and number of circuit boards and allowing for improved shielding as a result, providing alternate configurations to bypass damage, etc.